On 15/06/16 10:50, Jon Medhurst (Tixy) wrote:

On Wed, 2016-06-15 at 10:32 +0100, Sudeep Holla wrote:

quoted

quoted

That didn't fix things, but I noticed this morning there are PL310
errata workarounds too that we should have enabled:

PL310_ERRATA_769419
PL310_ERRATA_727915
PL310_ERRATA_588369

I had all the above enabled in my config which doesn't help either.

Thanks for letting me know, that's saved me from a tedious morning of
testing. Though did you also have the A9 errata enabled?

Yes I tried multi_v7_defconfig which has all the errata's enabled for A9

BTW, I noticed the PL310 Cache ID reports RTL version 3, which doesn't
appear in the list of versions in cache-l2x0.h and doesn't match the TRM
shipped on the vexpress CD, which is for version 2 (r1p0).

Yes I remember having similar observations from past. IIRC, it's one of
the earliest version used on that core-tile(which generally is the case
on few early versions of test chips)

Anyway, I'll test various Linux versions with the L2 cache removed from
device-tree to see if that reliably fixes things.

Thanks, but would like to see what Russell thinks about this approach
before you want to spend more time on that.

-- 
Regards,
Sudeep