[PATCH 20/45] KVM: arm/arm64: vgic-new: Add TARGET registers handlers
From: andre.przywara@arm.com (Andre Przywara)
Date: 2016-04-15 17:11:31
Also in:
kvm, kvmarm
Subsystem:
kernel virtual machine (kvm), the rest · Maintainers:
Paolo Bonzini, Linus Torvalds
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Changelog RFC..v1: - remove runtime VCPU determination from this v2-only register - fold in implementation of vgic_v2_irq_change_affinity() - replace ffs() with __ffs() --- virt/kvm/arm/vgic/vgic_mmio.c | 45 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/virt/kvm/arm/vgic/vgic_mmio.c b/virt/kvm/arm/vgic/vgic_mmio.c
index a8a96c8..b2f329a 100644
--- a/virt/kvm/arm/vgic/vgic_mmio.c
+++ b/virt/kvm/arm/vgic/vgic_mmio.c@@ -537,6 +537,49 @@ static int vgic_mmio_write_config(struct kvm_vcpu *vcpu, return 0; } +static int vgic_mmio_read_target(struct kvm_vcpu *vcpu, + struct kvm_io_device *dev, + gpa_t addr, int len, void *val) +{ + u32 intid = addr & 0x3ff; + int i; + + for (i = 0; i < len; i++) { + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); + + ((u8 *)val)[i] = irq->targets; + } + + return 0; +} + +static int vgic_mmio_write_target(struct kvm_vcpu *vcpu, + struct kvm_io_device *dev, + gpa_t addr, int len, const void *val) +{ + u32 intid = addr & 0x3ff; + int i; + + /* GICD_ITARGETSR[0-7] are read-only */ + if (intid < VGIC_NR_PRIVATE_IRQS) + return 0; + + for (i = 0; i < len; i++) { + struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, NULL, intid + i); + int target; + + spin_lock(&irq->irq_lock); + + irq->targets = ((u8 *)val)[i]; + target = irq->targets ? __ffs(irq->targets) : 0; + irq->target_vcpu = kvm_get_vcpu(vcpu->kvm, target); + + spin_unlock(&irq->irq_lock); + } + + return 0; +} + struct vgic_register_region vgic_v2_dist_registers[] = { REGISTER_DESC_WITH_LENGTH(GIC_DIST_CTRL, vgic_mmio_read_v2_misc, vgic_mmio_write_v2_misc, 12),
@@ -557,7 +600,7 @@ struct vgic_register_region vgic_v2_dist_registers[] = { REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PRI, vgic_mmio_read_priority, vgic_mmio_write_priority, 8), REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_TARGET, - vgic_mmio_read_nyi, vgic_mmio_write_nyi, 8), + vgic_mmio_read_target, vgic_mmio_write_target, 8), REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_CONFIG, vgic_mmio_read_config, vgic_mmio_write_config, 2), REGISTER_DESC_WITH_LENGTH(GIC_DIST_SOFTINT,
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2.7.3