On Thu, Apr 28, 2016 at 2:13 PM,  [off-list ref] wrote:

From: Patrice Chotard <redacted>

The particularities of this variant are:
- GPIO_XXX_LSB and GPIO_XXX_MSB memory locations are inverted compared
  to other variants.
- There is no Edge detection, Rising Edge and Falling Edge registers.
- IRQ flags are cleared when read, no need to write in Status register.

Signed-off-by: Amelie DELAUNAY <redacted>
Signed-off-by: Patrice Chotard <redacted>

Reviewed-by: Linus Walleij <redacted>

Yours,
Linus Walleij