[PATCH v2 07/10] gpio: stmpe: rework registers access
From: Linus Walleij <hidden>
Date: 2016-04-29 07:42:58
Also in:
linux-gpio, lkml
From: Linus Walleij <hidden>
Date: 2016-04-29 07:42:58
Also in:
linux-gpio, lkml
On Thu, Apr 28, 2016 at 2:13 PM, [off-list ref] wrote:
From: Patrice Chotard <redacted> This update allows to use registers map as following : regs[reg_index + offset] instead of regs[reg_index] + offset This makes code clearer and will facilitate the addition of STMPE1600 on which LSB and MSB registers are respectively located at addr and addr + 1. Despite for all others STMPE variant, LSB and MSB registers are respectively located in reverse order at addr + 1 and addr. For variant which have 3 registers's bank, we use LSB,CSB and MSB indexes which contains respectively LSB (or LOW), CSB (or MID) and MSB (or HIGH) register addresses (STMPE1801/STMPE24xx). For variant which have 2 registers's bank, we use LSB and CSB indexes only. In this case the CSB index contains the MSB regs address (STMPE 1601). Signed-off-by: Patrice Chotard <redacted>
Reviewed-by: Linus Walleij <redacted> Yours, Linus Walleij