Thread (10 messages) 10 messages, 2 authors, 2016-01-30
STALE3774d

[PATCH v2 1/3] Documentation: Update APM X-Gene clock binding for v2 hardware

From: Loc Ho <hidden>
Date: 2016-01-20 02:27:41
Also in: linux-clk
Subsystem: common clk framework, open firmware and flattened device tree bindings, the rest · Maintainers: Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds

Update APM X-Gene clock binding documentation for SoC and
PCP PLL for v2 hardware.

Signed-off-by: Loc Ho <redacted>
---
 Documentation/devicetree/bindings/clock/xgene.txt |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/xgene.txt b/Documentation/devicetree/bindings/clock/xgene.txt
index 1c4ef77..3fe3169 100644
--- a/Documentation/devicetree/bindings/clock/xgene.txt
+++ b/Documentation/devicetree/bindings/clock/xgene.txt
@@ -9,6 +9,8 @@ Required properties:
 	"apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
 	"apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
 	"apm,xgene-device-clock" - for a X-Gene device clock
+	"apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
+	"apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
 
 Required properties for SoC or PCP PLL clocks:
 - reg : shall be the physical PLL register address for the pll clock.
-- 
1.7.1
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