On Thu, Jan 14, 2016 at 11:38:44AM -0500, Mark Salter wrote:

[...]

You would lose that bet. AddressMinimum/Maximum describe the
PCI bus addresses.

In the mainline DT (APM Mustang), the CPU physical address corresponding
to IO space is 0xe010000000, PCI bus address is 0x0.

? ? ? ? ? ? ? ? QWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
????????????????????0x0000000000000000, // Granularity
????????????????????0x0000000010000000, // Range Minimum

????????????????????0x000000001000FFFF, // Range Maximum
????????????????????0x000000E000000000, // Translation Offset

See above, I will get the APM specifications to countercheck.

I agree with you we have to verify if this IO space limitation is
real or it is just an x86ism, in which case we remove that check.

Lorenzo

????????????????????0x0000000000010000, // Length
????????????????????,, , TypeStatic)

quoted

Jiang's patch:

https://lkml.org/lkml/2015/12/16/249

parses the IO descriptors and stores the AddressMinimum, AddressMaximum
in the IO resource (with AddressTranslation as offset which must be the
*CPU* physical address mapping IO), from the log above it seems to me in
AddressMinimum APM specifies the *CPU* physical address generating IO
cycles.

All in all, I was right to fear this would happen, and I already
raised the point within the ACPI spec working group, ACPI IO
descriptors specification is ambiguous and we must agree on how
they have to be specified once for all.

Lorenzo