Thread (18 messages) 18 messages, 6 authors, 2015-10-22

[PATCH v4 5/8] clk: rockchip: Allow the RK3288 SPDIF clocks to change their parent

From: heiko@sntech.de (Heiko Stübner)
Date: 2015-10-11 10:43:52
Also in: alsa-devel, linux-clk, linux-devicetree, linux-rockchip, lkml

Hi Sjoerd,

Am Freitag, 9. Oktober 2015, 13:35:55 schrieb Sjoerd Simons:
On Thu, 2015-10-08 at 17:10 +0200, Heiko Stuebner wrote:
quoted
Am Donnerstag, 8. Oktober 2015, 15:31:16 schrieb Sjoerd Simons:
quoted
The clock branches leading to sclk_spdif and sclk_spdif_8ch on
RK3288
SoCs only feed those clocks, allow those clocks to change their
parents
all the way up the hierarchy.

Signed-off-by: Sjoerd Simons <redacted>
Just as comment, if I'm seeing that right, this patch needs "clk:
rockchip:
handle mux dependency of fractional dividers" and friends [0] to
apply and
also actually handle the fractional dividers correctly.

For the clock change itself:
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Oh sorry yes, i completely forgot to at that as note on this patch
(series). These are on top of your series as those are required to make
things actually work as expected.

Which reminds me, i was wondering how to best move that forward. Could
you pick this one up to include it in the next round of your series?
(Otherwise i'm happy to rebase it once you do a v2)
I guess that will depend on how the core series gets handled. Aka if there 
needs to be a v2 (depending on the clock maintainers) I can pick that up as 
part of it. Otherwise we'll just need to ping the clock-maintainers separately 
on this patch if necessary.


Heiko
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