Thread (20 messages) 20 messages, 4 authors, 2015-07-28

[PATCH v4 7/7] arm64: dts: mt8173: Add subsystem clock controller device nodes

From: Daniel Kurtz <hidden>
Date: 2015-07-24 11:32:55
Also in: linux-devicetree, linux-mediatek, lkml

On Fri, Jul 24, 2015 at 11:02 AM, James Liao [off-list ref] wrote:
quoted hunk ↗ jump to hunk
This patch adds device nodes providing subsystem clocks on MT8173,
includes mmsys, imgsys, vdecsys, vencsys and vencltsys.

Signed-off-by: James Liao <redacted>
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi | 37 ++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index a2f63e4..8731d24 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -88,6 +88,13 @@
                #clock-cells = <0>;
        };

+       cpum_ck: dummy_clk {
I'm not a big fan of this "dummy_clk".
The 'name' part of the devicetree node is supposed to be generic.
So, perhaps just oscillator at 2, and move it down below clk32k: oscillator at 1.
Otherwise:

Reviewed-by: Daniel Kurtz <redacted>


-Dan

quoted hunk ↗ jump to hunk
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+               clock-output-names = "cpum_ck";
+       };
+
        clk26m: oscillator at 0 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
@@ -227,6 +234,36 @@
                        clocks = <&uart_clk>;
                        status = "disabled";
                };
+
+               mmsys: clock-controller at 14000000 {
+                       compatible = "mediatek,mt8173-mmsys", "syscon";
+                       reg = <0 0x14000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               imgsys: clock-controller at 15000000 {
+                       compatible = "mediatek,mt8173-imgsys", "syscon";
+                       reg = <0 0x15000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               vdecsys: clock-controller at 16000000 {
+                       compatible = "mediatek,mt8173-vdecsys", "syscon";
+                       reg = <0 0x16000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               vencsys: clock-controller at 18000000 {
+                       compatible = "mediatek,mt8173-vencsys", "syscon";
+                       reg = <0 0x18000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
+
+               vencltsys: clock-controller at 19000000 {
+                       compatible = "mediatek,mt8173-vencltsys", "syscon";
+                       reg = <0 0x19000000 0 0x1000>;
+                       #clock-cells = <1>;
+               };
        };
 };

--
1.8.1.1.dirty
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