[PATCH v5 2/2] ARM: dts: add property for maximum ADC clock frequencies
From: jic23@kernel.org (Jonathan Cameron)
Date: 2015-06-07 16:56:42
Also in:
linux-devicetree, linux-iio, lkml
On 27/05/15 13:47, Stefan Agner wrote:
The ADC clock frequency is limited depending on modes used. Add device tree property which allow to set the mode used and the maximum frequency ratings for the instance. These allows to set the ADC clock to a frequency which is within specification according to the actual mode used. Acked-by: Fugang Duan <redacted> Signed-off-by: Stefan Agner <stefan@agner.ch>
I'm happy to take this via IIO if people want me to, otherwise give it's connection to the previous patch that I just applied, Acked-by: Jonathan Cameron <jic23@kernel.org>
quoted hunk ↗ jump to hunk
--- arch/arm/boot/dts/vfxxx.dtsi | 4 ++++ 1 file changed, 4 insertions(+)diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi index a29c7ce..c6609bd 100644 --- a/arch/arm/boot/dts/vfxxx.dtsi +++ b/arch/arm/boot/dts/vfxxx.dtsi@@ -189,6 +189,8 @@ clocks = <&clks VF610_CLK_ADC0>; clock-names = "adc"; status = "disabled"; + fsl,adck-max-frequency = <30000000>, <40000000>, + <20000000>; }; wdoga5: wdog at 4003e000 {@@ -387,6 +389,8 @@ clocks = <&clks VF610_CLK_ADC1>; clock-names = "adc"; status = "disabled"; + fsl,adck-max-frequency = <30000000>, <40000000>, + <20000000>; }; esdhc1: esdhc at 400b2000 {