On Wed, Feb 18, 2015 at 12:27 PM, Bjorn Helgaas [off-list ref] wrote:

On Tue, Feb 17, 2015 at 02:03:01PM +0100, Tomasz Nowicki wrote:

quoted

On 11.12.2014 00:17, Bjorn Helgaas wrote:

quoted

On Wed, Nov 19, 2014 at 05:04:48PM +0100, Tomasz Nowicki wrote:

quoted

We are going to use mmio_config_{} name convention across all architectures.

mmio_config_*() are workarounds for an AMD Fam10h defect [1].  I would prefer
not to extend these names to other architectures, because they should be
able to use readb()/writeb()/etc. directly, as we did on x86 before
3320ad994afb ("x86: Work around mmio config space quirk on AMD Fam10h").

In fact, it would be nice if we could use readb()/writeb()/etc. on x86, and
only use mmio_config_*() when we're on AMD Fam10h.  Maybe there could be a
"struct pci_raw_ops pci_mmcfg_amd_fam10h" that used mmio_config_*(), and we
could set raw_pci_ext_ops to those ops instead of the default ones when
we're on AMD Fam10h.  Then x86 should be able to use the generic
readb()-based ops on most platforms.

While I do agree we should use readb()/writeb()... methods, I am not
sure there is a nice way to use mmio_config_*() exclusively for AMD
Fam10h. For x86, right now, we have three PCI config accessors sets:
mmconfig_32.c, mmconfig_64.c, numachip.c and each are different. So
one pci_mmcfg_amd_fam10h pci_raw_ops is not enough. I am thinking of
having additional structure (integrated with "struct
pci_mmcfg_region") that keeps MMIO accessors where readb()/writeb()
would be the default one. For AMD Fam10h case we could tweak it as
necessary. What do you thing Bjorn?

It's OK if we use mmio_config_*() for all x86 (not just AMD Fam10h); that's
what we do today.  It'd be *nicer* if we could use the workaround only for
Fam10h, but if it complicates the code, don't bother.

My main point is that I think your v1 posting requires every arch to
implement mmio_config_*(), and they will all be the same.  If an arch
doesn't require a workaround, it shouldn't have to supply anything and we
should default to readb/writeb/etc.

Perhaps the abstraction needs to move up a level to pci_ops functions.
Then x86 can use the generic ones I added and AMD can use custom ones.

BTW, there are some cases on MIPS that need special accessors. It's
mainly a function of whether the accessors need to do endian swapping
or not.

Rob