Thread (60 messages) 60 messages, 4 authors, 2014-07-03
STALE4381d

[PATCH 05/16] ARM: mvebu: Add workaround for cpuidle support for Armada 370

From: Gregory CLEMENT <hidden>
Date: 2014-07-03 08:44:34
Also in: linux-pm

Hi Thomas,

On 30/06/2014 14:50, Thomas Petazzoni wrote:
Dear Gregory CLEMENT,

On Fri, 27 Jun 2014 15:22:46 +0200, Gregory CLEMENT wrote:
quoted
On Armada 370, there is "a slow exit process from the deep idle state
due to heavy L1/L2 cache cleanup operations performed by the BootROM
software" (cf errata GL-BootROM-10). To avoid this, we replace the
restart code of the BootROM by a simple jump to the boot address. Then
the code located at this boot address will take care of the
initialization.

For this purpose, we use the common function mvebu_boot_addr_wa()
introduced in the previous commit.
"in the previous commit" would make sense if the commit immediately
before this one in the series was the one you would be referencing. But
that's not the case here, so it should be either: "introduced in one of
the previous commits", or better "introduced in commit <title of the
commit>".
Yes it should have been the previous commit at a point of development
and it was moved during a rebase. Using the title of the commit is more
reliable indeed.
quoted
 #define PMSU_BASE_OFFSET    0x100
 #define PMSU_REG_SIZE	    0x1000
@@ -77,6 +76,9 @@ extern void ll_enable_coherency(void);
 
 extern void armada_370_xp_cpu_resume(void);
 
+static unsigned long pmsu_mp_phys_base;
phys_addr_t.
OK


Thanks,

Gregory


-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com
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