[PATCHv6 2/4] iio: adc: exynos_adc: Control special clock of ADC to support Exynos3250 ADC
From: Chanwoo Choi <hidden>
Date: 2014-07-18 16:11:57
Also in:
linux-devicetree, linux-iio, linux-samsung-soc, lkml
On Sat, Jul 19, 2014 at 12:23 AM, Arnd Bergmann [off-list ref] wrote:
On Saturday 19 July 2014 00:15:35 Chanwoo Choi wrote:quoted
On Fri, Jul 18, 2014 at 8:14 PM, Arnd Bergmann [off-list ref] wrote:quoted
On Friday 18 July 2014 19:00:48 Chanwoo Choi wrote:quoted
On 07/18/2014 06:47 PM, Arnd Bergmann wrote:quoted
Further, why is it called "sclk_adc" rather than just "sclk"?The sclk means 'special clock' in Exynos TRM. Exynos SoC has varisou sclk clocks. 'sclk_adc' is only used for ADC IP.But that sounds like sclk_adc is the name of the global name of the clock signal coming out of the clock controller. I still think it would be best to name it 'sclk' as the input for the adc. It shouldn't rely on a particular name of the clock controller.I think 'sclk' is too common name. 'sclk' don't include specific device name. As I know, usual clock name includes the name of IP or includes the specific meaning for each IP.No, normally it does not include the name of the IP, that's my whole point. Including the name of the IP is completely pointless because that is implied by the fact that it's being used by that particular IP. Ideally you would find the data sheet for the ADC IP block and figure out what this clock is used for, then find the right name for that.
I mentioned the meaning of clocks ('adc', 'sclk_adc') as following in
patch description.
But, you think that need the more proper name instead of 'sclk_adc' to mean the
correct operation of 'sclk_adc'. I'll check once again the meaning of
'sclk_adc' in data sheet
and renaming it.
Exynos3250/Exynos4/Exynos5 has 'adc' clock as following:
- 'adc' clock: bus clock for ADC
Exynos3250 has additional 'sclk_adc' clock as following:
- 'sclk_adc' clock: special clock for ADC which provide clock to internal ADC
In a lot of cases, we are actually better off not naming the clocks at all but simply enumerating them if nobody knows what they are good for. In that case, you would simply have the first clock and the second clock of the ADC part and enable them both.
Thanks for your review. Chanwoo Choi