[PATCH 3/4 V3] irqchip: gic: Add supports for ARM GICv2m MSI(-X)
From: Jason Cooper <hidden>
Date: 2014-07-17 13:13:38
Also in:
linux-devicetree, linux-pci, lkml
On Wed, Jul 09, 2014 at 06:05:03PM -0500, suravee.suthikulpanit at amd.com wrote:
From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new set of register frames. This patch introduces support for
the non-secure GICv2m register frame.
The driver currently matchs "arm,gic-400-plus" in device tree binding,
which implements GICv2m.
The "msi-controller" keyword in ARM GIC devicetree binding is used to indentify
GIC driver that it should enable MSI(-X) support, The region of GICv2m MSI
register frame is specified using the register frame index 4 in the device tree.
MSI support is optional.
Each GIC maintains an "msi_chip" structure. To discover the msi_chip,
PCI host driver can do the following:
struct device_node *gic_node = of_irq_find_parent(pdev->dev.of_node);
pcie_bus->msi_chip = of_pci_find_msi_chip_by_node(gic_node);
Cc: Mark Rutland <Mark.Rutland@arm.com>
Cc: Marc Zyngier <redacted>
Cc: Jason Cooper <redacted>
Cc: Catalin Marinas <Catalin.Marinas@arm.com>
Cc: Will Deacon <redacted>
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
---
Documentation/devicetree/bindings/arm/gic.txt | 20 +-
arch/arm64/Kconfig | 1 +
drivers/irqchip/Kconfig | 7 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-gic-v2m.c | 251 ++++++++++++++++++++++++++
drivers/irqchip/irq-gic-v2m.h | 13 ++
drivers/irqchip/irq-gic.c | 23 ++-
drivers/irqchip/irq-gic.h | 31 +++-
8 files changed, 334 insertions(+), 13 deletions(-)
create mode 100644 drivers/irqchip/irq-gic-v2m.c
create mode 100644 drivers/irqchip/irq-gic-v2m.hApplied to irqchip/gic with some minor typos fixed in the commit message. thx, Jason.