[PATCH v8 0/6] efuse driver for Tegra · Peter De Schrijver <hidden> · 2014-06-12
[PATCH v8 1/6] ARM: tegra: export apb dma readl/writel · Peter De Schrijver <hidden> · 2014-06-12
[PATCH v8 2/6] ARM: tegra: move fuse exports to tegra-soc.h · Peter De Schrijver <hidden> · 2014-06-12
[PATCH v8 4/6] ARM: tegra: Add efuse and apbmisc bindings · Peter De Schrijver <hidden> · 2014-06-12
[PATCH v8 5/6] ARM: tegra: build new fuse driver in drivers/misc · Peter De Schrijver <hidden> · 2014-06-12
[PATCH v8 6/6] misc: fuse: move APB DMA into Tegra20 fuse driver · Peter De Schrijver <hidden> · 2014-06-12
Re: [PATCH v8 0/6] efuse driver for Tegra · Stephen Warren <hidden> · 2014-06-12
Re: [PATCH v8 0/6] efuse driver for Tegra · Peter De Schrijver <hidden> · 2014-06-13
Re: [PATCH v8 0/6] efuse driver for Tegra · Peter De Schrijver <hidden> · 2014-06-13
Re: [PATCH v8 0/6] efuse driver for Tegra · Stephen Warren <hidden> · 2014-06-13
Re: [PATCH v8 0/6] efuse driver for Tegra · Stephen Warren <hidden> · 2014-06-16

[PATCH v8 0/6] efuse driver for Tegra

From: Stephen Warren <hidden>
Date: 2014-06-12 22:17:02
Also in: linux-devicetree, linux-tegra

On 06/12/2014 09:36 AM, Peter De Schrijver wrote:

This driver allows userspace to read the raw efuse data. Its userspace
interface is modelled after the sunxi_sid driver which provides similar
functionality for some Allwinner SoCs. It has been tested on
Tegra20 (ventana), Tegra30 (beaverboard), Tegra114 (dalmore) and
Tegra124 (jetson TK1).

I think this series looks OK now. However, I noticed one change in
behaviour that I don't think is expected:

The current code/DTB print:
Tegra Revision: A01 SKU: 0 CPU Process: 0 Core Process: 0

However, applying these patches and booting yields:
Tegra Revision: A01 SKU: 0 CPU Process: 1 Core Process: 1

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