Thread (22 messages) 22 messages, 5 authors, 2014-07-10

[PATCH 8/9] ARM: kernel: add support for cpu cache information

From: Stephen Boyd <hidden>
Date: 2014-06-26 18:45:18
Also in: lkml

On 06/26/14 04:36, Sudeep Holla wrote:
Hi Stephen,

On 26/06/14 01:19, Stephen Boyd wrote:
quoted
On 06/25/14 10:30, Sudeep Holla wrote:
quoted
+
+/*
+ * Which cache CCSIDR represents depends on CSSELR value
+ * Make sure no one else changes CSSELR during this
+ * smp_call_function_single prevents preemption for us
+ */
Where's the smp_call_function_single() or preemption disable happening?
init_cache_level is called using smp_call_function_single in
drivers/base/cacheinfo.c(PATCH 2/9)
Oh that's unexpected. Do other architectures require the use of
smp_call_function_single() to read their cache information? It seems
like an ARM architecture specific detail that has been pushed up into
the generic layer.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help