[PATCH v6 1/7] phy: add a driver for the Berlin SATA PHY
From: sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)
Date: 2014-06-17 18:17:09
Also in:
linux-devicetree, linux-ide, lkml
On 06/16/2014 12:26 PM, Antoine T?nart wrote:
The Berlin SoC has a two SATA ports. Add a PHY driver to handle them. The mode selection can let us think this PHY can be configured to fit other purposes. But there are reasons to think the SATA mode will be the only one usable: the PHY registers are only accessible indirectly through two registers in the SATA range, the PHY seems to be integrated and no information tells us the contrary. For these reasons, make the driver a SATA PHY driver. Signed-off-by: Antoine T?nart <redacted> ---
[...]
quoted hunk ↗ jump to hunk
diff --git a/drivers/phy/phy-berlin-sata.c b/drivers/phy/phy-berlin-sata.c new file mode 100644 index 000000000000..907897a02672 --- /dev/null +++ b/drivers/phy/phy-berlin-sata.c@@ -0,0 +1,232 @@ +/* + * Marvell Berlin SATA PHY driver + * + * Copyright (C) 2014 Marvell Technology Group Ltd. + * + * Antoine T?nart <antoine.tenart@free-electrons.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/module.h> +#include <linux/phy/phy.h> +#include <linux/io.h> +#include <linux/platform_device.h> + +#define HOST_VSA_ADDR 0x0 +#define HOST_VSA_DATA 0x4 +#define PORT_VSR_ADDR 0x78 +#define PORT_VSR_DATA 0x7c +#define PORT_SCR_CTL 0x2c + +#define CONTROL_REGISTER 0x0 +#define MBUS_SIZE_CONTROL 0x4 + +#define POWER_DOWN_PHY0 BIT(6) +#define POWER_DOWN_PHY1 BIT(14) +#define MBUS_WRITE_REQUEST_SIZE_128 (BIT(2) << 16) +#define MBUS_READ_REQUEST_SIZE_128 (BIT(2) << 19) + +#define PHY_BASE 0x200
Antoine, I gave your Berlin AHCI patches a try on BG2. I finally got it working but BG2 has a different PHY_BASE and need some register fixups. Please update this patch and the DT bindings to reflect the difference of BG2Q with respect to BG2 as below. [...]
+
+static const struct of_device_id phy_berlin_sata_of_match[] = {
+ { .compatible = "marvell,berlin-sata-phy" },s/marvell,berlin-sata-phy/marvell,berlin2-sata-phy/ and add marvell,berlin2q-sata-phy That way it can be applied now without proper support for BG2 and I can send patches later. Sebastian
+ { },
+};
+
+static struct platform_driver phy_berlin_sata_driver = {
+ .probe = phy_berlin_sata_probe,
+ .driver = {
+ .name = "phy-berlin-sata",
+ .owner = THIS_MODULE,
+ .of_match_table = phy_berlin_sata_of_match,
+ },
+};
+module_platform_driver(phy_berlin_sata_driver);
+
+MODULE_DESCRIPTION("Marvell Berlin SATA PHY driver");
+MODULE_AUTHOR("Antoine T?nart [off-list ref]");
+MODULE_LICENSE("GPL v2");