[PATCHv2] Fix CAN on socfpga, for net/master
From: Pavel Machek <hidden>
Date: 2014-05-13 12:07:53
Also in:
linux-can
Hi!
Please split into several patches: - add 32 bit accessor functions and replace two 16 bit accesses by a single 32 bit access - if-DCAN-then-32bit access please explain in the commit message why this is needed - add hwinit support for non ti devices
quoted
@@ -88,7 +89,8 @@ static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable) spin_lock(&raminit_lock); ctrl = readl(priv->raminit_ctrlreg); - /* We clear the done and start bit first. The start bit is + /* + * We clear the done and start bit first. The start bit isPlease don't change the commenting style.
Ok.
quoted
+static void c_can_hw_raminit(const struct c_can_priv *priv, bool enable) +{ + u32 ctrl; + + spin_lock(&raminit_lock); + + ctrl = readl(priv->raminit_ctrlreg);As far as I can see raminit_ctrlreg is in this case a non shared resource, so you don't need any spinlock. Also you don't need to use raminit_ctrlreg, as it is C_CAN_FUNCTION_REG.
I was adapting existing code which had the raminit paths shared. Will remove the spinlock. And yes, I can replace it with priv->read_... , but it will result in some churn of consts...
quoted
+static void c_can_plat_write_reg32(struct c_can_priv *priv, enum reg index, + u32 val) +{ + priv->write_reg(priv, index + 1, val>>16);^ ^ Please add spaces around the >>
Sorry about that. Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html