[PATCH 054/222] ARM: l2c: ux500: don't try to change the L2 cache auxiliary control register
From: Russell King <hidden>
Date: 2014-04-25 11:35:32
Subsystem:
arm port, arm/nomadik/ux500 architectures, the rest · Maintainers:
Russell King, Linus Walleij, Linus Torvalds
ux500 can't change the auxiliary control register, so there's no point passing values to try and modify it to the l2x0 init functions. Acked-by: Linus Walleij <redacted> Signed-off-by: Russell King <redacted> --- arch/arm/mach-ux500/cache-l2x0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index 5b891d051054..842ebedbdd1c 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c@@ -57,9 +57,9 @@ static int __init ux500_l2x0_init(void) outer_cache.write_sec = ux500_l2c310_write_sec; if (of_have_populated_dt()) - l2x0_of_init(0x3e000000, 0xc00f0fff); + l2x0_of_init(0, ~0); else - l2x0_init(l2x0_base, 0x3e000000, 0xc00f0fff); + l2x0_init(l2x0_base, 0, ~0); return 0; }
--
1.8.3.1