Add DSB after icache flush. It's needed to complete the cache maintenance
operation. The function __flush_icache_all() is used only for user space
mappings and an ISB is not required because of an exception return before
executing user instructions. An exception return would behave like an ISB.
This patch also uses 'memory' clobber for flush operation instruction to
prevent instruction re-ordering by compiler.
Signed-off-by: Vinayak Kale <redacted>
---
V2: - Add more desciption in the commit message as suggested by Catalin & Will
- Use 'memory' clobber for flush instruction as suggested by Will
arch/arm64/include/asm/cacheflush.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
index fea9ee3..bd30f42 100644
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -115,7 +115,8 @@ extern void flush_dcache_page(struct page *);
static inline void __flush_icache_all(void)
{
- asm("ic ialluis");
+ asm volatile("ic ialluis" : : : "memory");
+ dsb();
}
#define flush_dcache_mmap_lock(mapping) \--
1.8.2.1