[RFC v1 13/16] arm: mvebu: PCIe Device Tree informations for Armada XP DB
From: Thomas Petazzoni <hidden>
Date: 2012-12-07 22:04:36
Subsystem:
the rest · Maintainer:
Linus Torvalds
From: Thomas Petazzoni <hidden>
Date: 2012-12-07 22:04:36
Subsystem:
the rest · Maintainer:
Linus Torvalds
The Marvell evaluation board (DB) for the Armada XP SoC has 6 physicals full-size PCIe slots, so we enable the corresponding PCIe interfaces in the Device Tree. Signed-off-by: Thomas Petazzoni <redacted> --- arch/arm/boot/dts/armada-xp-db.dts | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts
index 8e53b25..cd378ae 100644
--- a/arch/arm/boot/dts/armada-xp-db.dts
+++ b/arch/arm/boot/dts/armada-xp-db.dts@@ -90,5 +90,32 @@ phy = <&phy3>; phy-mode = "sgmii"; }; + + pcie-controller { + status = "okay"; + + /* + * All 6 slots are physically present as + * standard PCIe slots on the board. + */ + pcie0.0 at 0xd0040000 { + status = "okay"; + }; + pcie0.1 at 0xd0044000 { + status = "okay"; + }; + pcie0.2 at 0xd0048000 { + status = "okay"; + }; + pcie0.3 at 0xd004C000 { + status = "okay"; + }; + pcie2 at 0xd0042000 { + status = "okay"; + }; + pcie3 at 0xd0082000 { + status = "okay"; + }; + }; }; };
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