Thread (82 messages) 82 messages, 12 authors, 2012-10-08

[kvmarm] [PATCH 10/15] KVM: ARM: World-switch implementation

From: Peter Maydell <hidden>
Date: 2012-09-30 09:48:48
Also in: kvm

On 30 September 2012 01:33, Christoffer Dall
[off-list ref] wrote:
On Tue, Sep 25, 2012 at 1:42 PM, Marc Zyngier [off-list ref] wrote:
quoted
Well, we're still in HYP mode when performing the pop, so the VMID is
pretty much irrelevant. Same for the initial push, actually. As long as
we're sure VTTBR has been updated when we do the exception return, I think
we're safe.
yeah we're safe, but I can't find anywhere that says the ISB is
implied from exception handling/hvc, even though I seem to recall
having read this, so I put this here not to worry other readers.
"TLB maintenance operations and the memory order model" in section
B3.10.1 of the ARM ARM says that exception entry forces completion of
TLB maintenance ops. Section B5.6.3 ("Synchronization of changes to
system control registers") says that taking an exception synchronizes
context, so the VTTBR update is guaranteed to have happened.

-- PMM
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