[PATCH v3 RESEND 10/17] ARM: LPAE: use phys_addr_t in switch_mm()

On 09/24/12 10:05, Catalin Marinas wrote:

On Fri, Sep 21, 2012 at 04:56:08PM +0100, Cyril Chemparathy wrote:

quoted

This patch modifies the switch_mm() processor functions to use phys_addr_t.
On LPAE systems, we now honor the upper 32-bits of the physical address that
is being passed in, and program these into TTBR as expected.

Signed-off-by: Cyril Chemparathy <redacted>
Signed-off-by: Vitaly Andrianov <redacted>
---

[...]

quoted

diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index 8de0f1d..c4f4251 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S

[...]

quoted

  ENTRY(cpu_v7_switch_mm)
  #ifdef CONFIG_MMU
-	ldr	r1, [r1, #MM_CONTEXT_ID]	@ get mm->context.id
-	and	r3, r1, #0xff
-	mov	r3, r3, lsl #(48 - 32)		@ ASID
-	mcrr	p15, 0, r0, r3, c2		@ set TTB 0
+	ldr	r2, [r2, #MM_CONTEXT_ID]	@ get mm->context.id
+	and	r2, r2, #0xff
+	mov	r2, r2, lsl #(48 - 32)		@ ASID
+	orr	rpgdh, rpgdh, r2		@ upper 32-bits of pgd phys

Can you do:

	orr	rpgdh, rpgdh, r2, lsl #(48 - 32)

Sure.  Thanks.

-- Cyril.