Add the pinmux settings for USB PHY overcurrent pins.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <redacted>
Cc: Fabio Estevam <redacted>
Cc: Mark Brown <redacted>
Cc: Shawn Guo <redacted>
---
arch/arm/boot/dts/imx28.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
V2: This is pulled from the M28EVK and SPS1 board files, put it into common
file.
Update the mach-mxs machine by removing the enet_clkout(). The new
revision of the board doesn't need that. Also, update the DTS file
with all the new drivers pulled in the mainline recently, that is,
SPI, LRADC, USB.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <redacted>
Cc: Shawn Guo <redacted>
---
arch/arm/boot/dts/imx28-m28evk.dts | 81 +++++++++++++++++++++++++++++++++---
arch/arm/mach-mxs/mach-mxs.c | 1 -
2 files changed, 75 insertions(+), 7 deletions(-)
Move the usbphy overcurrent definition to include file.
On Sat, Aug 25, 2012 at 01:51:37AM +0200, Marek Vasut wrote:
Add this SSP port 2 pin multiplexing configuration into the imx28.dtsi file.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <redacted>
Cc: Fabio Estevam <redacted>
Cc: Mark Brown <redacted>
Cc: Shawn Guo <redacted>
On Sat, Aug 25, 2012 at 01:51:38AM +0200, Marek Vasut wrote:
quoted hunk
Add the pinmux settings for USB PHY overcurrent pins.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <redacted>
Cc: Fabio Estevam <redacted>
Cc: Mark Brown <redacted>
Cc: Shawn Guo <redacted>
---
arch/arm/boot/dts/imx28.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
V2: This is pulled from the M28EVK and SPS1 board files, put it into common
file.
Documentation/devicetree/bindings/regulator/fixed-regulator.txt:
- enable-active-high: Polarity of GPIO is Active high
If this property is missing, the default assumed is Active low.
I suspect you need to recheck this aspect for all these 3 fixed
regulators.
We should use the short name as prefix if it has one.
+
+ memory {
+ reg = <0x40000000 0x08000000>;
+ };
+
+ apb at 80000000 {
+ apbh at 80000000 {
+ pinctrl at 80018000 {
+ led_pins_sps1: leds at 0 {
It should be referenced by the pinctrl state directly under node
pinctrl at 80018000, otherwise the pins will not be set up.
Also we usually use a generic name here something like
hog_pins_a: hog at 0 {
so that we do not need to create new node every time we add pins
for a new module.
We should use the short name as prefix if it has one.
quoted
+
+ memory {
+ reg = <0x40000000 0x08000000>;
+ };
+
+ apb at 80000000 {
+ apbh at 80000000 {
+ pinctrl at 80018000 {
+ led_pins_sps1: leds at 0 {
It should be referenced by the pinctrl state directly under node
pinctrl at 80018000, otherwise the pins will not be set up.
Also we usually use a generic name here something like
hog_pins_a: hog at 0 {
so that we do not need to create new node every time we add pins
for a new module.
So I'll ignore this comment and add pinctrl call into leds-gpio ... can we agree
on that ?
[...]
Documentation/devicetree/bindings/regulator/fixed-regulator.txt:
- enable-active-high: Polarity of GPIO is Active high
If this property is missing, the default assumed is Active low.
I suspect you need to recheck this aspect for all these 3 fixed
regulators.
Ok, so the prop had no impact? I'll retest and resubmit. Also, put the SPS1 on
hold until the led issue is done for.
Thanks
From: Michael Grzeschik <hidden> Date: 2013-11-22 15:49:47
Hi Marek, Peter,
On Sat, Aug 25, 2012 at 01:51:38AM +0200, Marek Vasut wrote:
quoted hunk
Add the pinmux settings for USB PHY overcurrent pins.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <redacted>
Cc: Fabio Estevam <redacted>
Cc: Mark Brown <redacted>
Cc: Shawn Guo <redacted>
---
arch/arm/boot/dts/imx28.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
V2: This is pulled from the M28EVK and SPS1 board files, put it into common
file.
@Marek: Did you test the overcurrent functionality with the MX28 and this pinmux?
I currently can not trigger any overcurrent events and also don't
see changes in the PORTSC register after pulling the OC pin to 3V3.
Thanks,
Michael
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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@Marek: Did you test the overcurrent functionality with the MX28 and this
pinmux?
I currently can not trigger any overcurrent events and also don't
see changes in the PORTSC register after pulling the OC pin to 3V3.
I haven't checked pinmux detail, have you enabled oc and
set oc's polarity (HW_DIGCTL_CTRL - 8001_C000h)?
Peter
@Marek: Did you test the overcurrent functionality with the MX28 and this
pinmux?
I currently can not trigger any overcurrent events and also don't
see changes in the PORTSC register after pulling the OC pin to 3V3.
I haven't checked pinmux detail, have you enabled oc and
set oc's polarity (HW_DIGCTL_CTRL - 8001_C000h)?
No, I was not aware those DIG*DEEP*CTL bits exist. :)
Thank you Peter!
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
Hi Marek, Peter,
On Sat, Aug 25, 2012 at 01:51:38AM +0200, Marek Vasut wrote:
quoted
Add the pinmux settings for USB PHY overcurrent pins.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <redacted>
Cc: Fabio Estevam <redacted>
Cc: Mark Brown <redacted>
Cc: Shawn Guo <redacted>
---
arch/arm/boot/dts/imx28.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
V2: This is pulled from the M28EVK and SPS1 board files, put it into
common
file.
@Marek: Did you test the overcurrent functionality with the MX28 and this
pinmux?
I currently can not trigger any overcurrent events and also don't
see changes in the PORTSC register after pulling the OC pin to 3V3.
Sorry for the late reply, I see Peter already replied. Do you see the changes if
you configure the pin as a GPIO at least ?
Best regards,
From: Michael Grzeschik <hidden> Date: 2013-11-25 13:42:48
Hi Marek, Peter,
On Mon, Nov 25, 2013 at 12:58:32AM +0100, Marek Vasut wrote:
Hello Michael,
quoted
Hi Marek, Peter,
On Sat, Aug 25, 2012 at 01:51:38AM +0200, Marek Vasut wrote:
quoted
Add the pinmux settings for USB PHY overcurrent pins.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chris Ball <redacted>
Cc: Fabio Estevam <redacted>
Cc: Mark Brown <redacted>
Cc: Shawn Guo <redacted>
---
arch/arm/boot/dts/imx28.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
V2: This is pulled from the M28EVK and SPS1 board files, put it into
common
file.
@Marek: Did you test the overcurrent functionality with the MX28 and this
pinmux?
I currently can not trigger any overcurrent events and also don't
see changes in the PORTSC register after pulling the OC pin to 3V3.
Sorry for the late reply, I see Peter already replied. Do you see the changes if
you configure the pin as a GPIO at least ?
The GPIO is working for this pin. But also the DIGCTL register bits
helped here. Now the OC event triggers if the pin gets pulled to 3V3.
I am currently looking for a good place to enable the DIGCTL bits.
I suggest to enable them per default. As we don't have USBMISC registers
in MX28, the bits should be toggled in ci_hdrc_imx.c if the of property
"disable-overcurrent" is not found. I will use the syscon interface to
reach them with the regmap interface.
Any objections?
Regards,
Michael
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
From: Peter Chen <hidden> Date: 2013-11-26 12:08:03
The GPIO is working for this pin. But also the DIGCTL register bits
helped here. Now the OC event triggers if the pin gets pulled to 3V3.
I am currently looking for a good place to enable the DIGCTL bits.
I suggest to enable them per default. As we don't have USBMISC registers
in MX28, the bits should be toggled in ci_hdrc_imx.c if the of property
"disable-overcurrent" is not found. I will use the syscon interface to
reach them with the regmap interface.
Hi Michael,
usbmisc register doesn't stand for the register needs to be in usb controller.
Any registers which are related to USB function can be considered as usbmisc
registers. You will see FSL-style SoC, the over-current or other related setting
are at controller base + 0x800 (0x600), but Sigmatel-style SoC (mx28/mx23), the usb
register are not at controller register region.
My suggestion is: create usbmisc node for mx28, and put oc setting at there, it can
keep ci_hdrc_imx.c clean.
Besides, you may need two dts user setting for oc enable and oc polarity.
Peter
From: Michael Grzeschik <hidden> Date: 2013-12-06 15:17:33
Hi Peter,
On Tue, Nov 26, 2013 at 12:08:03PM +0000, Peter Chen wrote:
quoted
The GPIO is working for this pin. But also the DIGCTL register bits
helped here. Now the OC event triggers if the pin gets pulled to 3V3.
I am currently looking for a good place to enable the DIGCTL bits.
I suggest to enable them per default. As we don't have USBMISC registers
in MX28, the bits should be toggled in ci_hdrc_imx.c if the of property
"disable-overcurrent" is not found. I will use the syscon interface to
reach them with the regmap interface.
usbmisc register doesn't stand for the register needs to be in usb controller.
Any registers which are related to USB function can be considered as usbmisc
registers. You will see FSL-style SoC, the over-current or other related setting
are at controller base + 0x800 (0x600), but Sigmatel-style SoC (mx28/mx23), the usb
register are not at controller register region.
My suggestion is: create usbmisc node for mx28, and put oc setting at there, it can
keep ci_hdrc_imx.c clean.
Besides, you may need two dts user setting for oc enable and oc polarity.
IMHO usbmisc is a driver with memery mapped region. So it would probably
make more sense to use syscon for that purpose, as we only need special
registers out of the digctl register.
What do you think of that code:
@@ -105,6 +111,26 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)conststructof_device_id*of_id=of_match_device(ci_hdrc_imx_dt_ids,&pdev->dev);conststructci_hdrc_imx_platform_flag*imx_platform_flag=of_id->data;+structdevice_node*np=pdev->dev.of_node;+structregmap*digctl;++/* Some SoCs don't have digctl registers */+if(of_get_property(np,"fsl,digctl",NULL)){+structof_phandle_argsargs;+intenable_bit=USB_OTG_OC_ENABLE_BIT;+ret=of_parse_phandle_with_args(np,"fsl,digctl","#index-cells",+0,&args);+digctl=syscon_regmap_lookup_by_phandle+(np,"fsl,digctl");+if(IS_ERR(digctl)){+dev_dbg(&pdev->dev,+"failed to find regmap for digctl\n");+}else{+if(args.args[0])+enable_bit=USB_H1_OC_ENABLE_BIT;+regmap_write(digctl,DIGCTL_CTRL_SET,enable_bit);+}+}data=devm_kzalloc(&pdev->dev,sizeof(*data),GFP_KERNEL);if(!data){
From: Peter Chen <hidden> Date: 2013-12-09 05:12:32
On Fri, Dec 06, 2013 at 04:17:33PM +0100, Michael Grzeschik wrote:
Hi Peter,
On Tue, Nov 26, 2013 at 12:08:03PM +0000, Peter Chen wrote:
quoted
quoted
The GPIO is working for this pin. But also the DIGCTL register bits
helped here. Now the OC event triggers if the pin gets pulled to 3V3.
I am currently looking for a good place to enable the DIGCTL bits.
I suggest to enable them per default. As we don't have USBMISC registers
in MX28, the bits should be toggled in ci_hdrc_imx.c if the of property
"disable-overcurrent" is not found. I will use the syscon interface to
reach them with the regmap interface.
usbmisc register doesn't stand for the register needs to be in usb controller.
Any registers which are related to USB function can be considered as usbmisc
registers. You will see FSL-style SoC, the over-current or other related setting
are at controller base + 0x800 (0x600), but Sigmatel-style SoC (mx28/mx23), the usb
register are not at controller register region.
My suggestion is: create usbmisc node for mx28, and put oc setting at there, it can
keep ci_hdrc_imx.c clean.
Besides, you may need two dts user setting for oc enable and oc polarity.
IMHO usbmisc is a driver with memery mapped region. So it would probably
make more sense to use syscon for that purpose, as we only need special
registers out of the digctl register.
Hi Michael, the reason why we have usbmisc is that we want to hide SoC's
differentiate at ci_hdrc_imx.c, and call uniform APIs in it. We already
have over-current handling at usbmisc for other SoCs, it is better to put
all i.mx over-current handlings at the same place.
Yes, when we design usbmisc, we just thought it was for usb non-core register
and this register region is only for USB, but now, we find it is not correct
for i.mx28 whose usb registers are at other regions and shared with others
modules.
I think usbmisc should handle it, that is some SoCs uses memory mapped region,
and others use syscon. It is SoC differentiate, the dts can describe it.
Peter
@@ -105,6 +111,26 @@ static int ci_hdrc_imx_probe(struct platform_device *pdev)conststructof_device_id*of_id=of_match_device(ci_hdrc_imx_dt_ids,&pdev->dev);conststructci_hdrc_imx_platform_flag*imx_platform_flag=of_id->data;+structdevice_node*np=pdev->dev.of_node;+structregmap*digctl;++/* Some SoCs don't have digctl registers */+if(of_get_property(np,"fsl,digctl",NULL)){+structof_phandle_argsargs;+intenable_bit=USB_OTG_OC_ENABLE_BIT;+ret=of_parse_phandle_with_args(np,"fsl,digctl","#index-cells",+0,&args);+digctl=syscon_regmap_lookup_by_phandle+(np,"fsl,digctl");+if(IS_ERR(digctl)){+dev_dbg(&pdev->dev,+"failed to find regmap for digctl\n");+}else{+if(args.args[0])+enable_bit=USB_H1_OC_ENABLE_BIT;+regmap_write(digctl,DIGCTL_CTRL_SET,enable_bit);+}+}data=devm_kzalloc(&pdev->dev,sizeof(*data),GFP_KERNEL);if(!data){