[PATCH v2 11/22] ARM: LPAE: use 64-bit accessors for TTBR registers
From: Nicolas Pitre <hidden>
Date: 2012-08-12 04:11:38
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On Fri, 10 Aug 2012, Cyril Chemparathy wrote:
quoted hunk ↗ jump to hunk
This patch adds TTBR accessor macros, and modifies cpu_get_pgd() and the LPAE version of cpu_set_reserved_ttbr0() to use these instead. In the process, we also fix these functions to correctly handle cases where the physical address lies beyond the 4G limit of 32-bit addressing. Signed-off-by: Cyril Chemparathy <redacted> Signed-off-by: Vitaly Andrianov <redacted> --- arch/arm/include/asm/proc-fns.h | 24 +++++++++++++++++++----- arch/arm/mm/context.c | 9 ++------- 2 files changed, 21 insertions(+), 12 deletions(-)diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h index 75b5f14..24224df 100644 --- a/arch/arm/include/asm/proc-fns.h +++ b/arch/arm/include/asm/proc-fns.h@@ -116,13 +116,27 @@ extern void cpu_resume(void); #define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm) #ifdef CONFIG_ARM_LPAE + +#define cpu_get_ttbr(nr) \ + ({ \ + u64 ttbr; \ + __asm__("mrrc p15, " #nr ", %Q0, %R0, c2" \ + : "=r" (ttbr) \ + : : "cc"); \ + ttbr; \ + })
I don't think you have to clobber the condition code (cc) here. It has been a long while since the ability to pass a condition code inside an inline assembly statement was removed from gcc. Other that that... Acked-by: Nicolas Pitre <redacted> Nicolas