Thread (46 messages) 46 messages, 3 authors, 2012-08-21
STALE5051d

[PATCH v5 3/3] ARM: OMAP2+: onenand: prepare for gpmc driver migration

From: Jon Hunter <hidden>
Date: 2012-07-02 17:29:03
Also in: linux-omap

On 07/02/2012 04:43 AM, Mohammed, Afzal wrote:
Hi Tony,

On Mon, Jul 02, 2012 at 12:06:51, Tony Lindgren wrote:
quoted
* Jon Hunter [off-list ref] [120628 09:48]:
quoted
quoted
The above change seems to imply that Tony's n900 is dependent on the bootloader settings
and not those being set by the kernel. Ideally, we should not need to set the async mode
in the onenand before we set the onenand timings in the gpmc (per Afzal's changelog
comment). This appears backwards.
That should not be the case, I'm more likely to believe in Afzal's explanation.
Not sure whether you are fine with fixing up this patch with added diff

Assuming inferences so far is not wrong, right now this patch with the added diff
would be perfectly fine.

Problem would happen when we are at a stage to do gpmc reset using hwmod [seems
miles to go before I sleep {or read gpmc hwmod reset} ;)]. If bootloader left
onenand configured in sync mode, to switch onenand to async mode, first configuring
gpmc to sync mode would be required & for that we need frequency information
from onenand and to get that information from onenand, gpmc has to be configured
for sync mode and to configure gpmc to sync mode ....
You are concerned about hwmod performing a reset of the gpmc during
boot? We should be able to use the HWMOD_INIT_NO_RESET flag to prevent
this. Would that work?

Cheers
Jon
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