Thread (16 messages) 16 messages, 2 authors, 2012-06-27
STALE5105d

[PATCH 1/2 V3] MXS: Set I2C timing registers for mxs-i2c

From: Shawn Guo <hidden>
Date: 2012-06-11 07:30:38
Also in: linux-i2c

On Sun, Jun 10, 2012 at 01:53:05PM +0200, Marek Vasut wrote:
quoted
+struct mxs_i2c_speed_config {
+	uint32_t	timing0;
+	uint32_t	timing1;
+	uint32_t	timing2;
+};
+
+/* Timing values for the default 24MHz clock supplied into the i2c block.
Thinking about these further -- does anyone have any idea how these numbers were 
derived? And possibly even formula for that?

And maybe we should somehow make sure the source runs on 24MHz (how?).
There is nothing about I2C clock mentioned in CLKCTRL chapter.  I just
contacted design team and was told that I2C clock sources from APBX
(xbus) clock and always runs at the same frequency there.

-- 
Regards,
Shawn
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