@@ -48,10 +48,56 @@ static int __init omap2_init_pmu(void)
 	return 0;
 }
 
+/*
+ * omap4430_init_pmu - creates and registers PMU platform device
+ *
+ * Uses OMAP HWMOD framework to create and register an ARM PMU device.
+ * Only supports OMAP4430 devices that require PMU interrupts to be
+ * routed to the interrupt controller via the coresight cross trigger
+ * interface (CTI). To route the interrpts via the coresight CTI module,
+ * the OMAP modules L3_MAIN_3, L3_INSTR and DEBUGSS need to be active.
+ */
+static int __init omap4430_init_pmu(void)
+{
+	int id = -1;
+	struct omap_hwmod *oh[3];
+	char *oh_name;
+	char *dev_name = "arm-pmu";
+
+	oh_name = "l3_main_3";
+	oh[0] = omap_hwmod_lookup(oh_name);
+	if (!oh[0]) {
+		pr_err("Could not look up %s hwmod\n", oh_name);
+		return -ENODEV;
+	}
+	oh_name = "l3_instr";
+	oh[1] = omap_hwmod_lookup(oh_name);
+	if (!oh[1]) {
+		pr_err("Could not look up %s hwmod\n", oh_name);
+		return -ENODEV;
+	}
+	oh_name = "debugss";
+	oh[2] = omap_hwmod_lookup(oh_name);
+	if (!oh[2]) {
+		pr_err("Could not look up %s hwmod\n", oh_name);
+		return -ENODEV;
+	}
+
+	omap_pmu_dev = omap_device_build_ss(dev_name, id, oh, 3, NULL,
+				0, NULL, 0, 0);
+	WARN(IS_ERR(omap_pmu_dev), "Can't build omap_device for %s.\n",
+				dev_name);
+
+	return 0;
+}
+
 static int __init omap_init_pmu(void)
 {
+
 	if (cpu_is_omap24xx() || cpu_is_omap34xx())
 		return omap2_init_pmu();
+	if (cpu_is_omap443x())
+		return omap4430_init_pmu();
 
 	return 0;
 }