[PATCH V3 4/8] SPEAr: clk: Add Auxiliary Synthesizer clock
From: Viresh Kumar <hidden>
Date: 2012-04-27 04:45:20
Subsystem:
common clk framework, spear platform/clock/pinctrl support, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Viresh Kumar, Linus Torvalds
On 4/24/2012 12:20 PM, Viresh KUMAR wrote:
All SPEAr SoC's contain Auxiliary Synthesizers. Their Fout is derived based on values of eq, x and y. Fout from synthesizer can be given from two equations: Fout1 = (Fin * X/Y)/2 EQ1 Fout2 = Fin * X/Y EQ2 This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar <redacted>
fixup! SPEAr: clk: Add Auxiliary Synthesizer clock
---
drivers/clk/spear/clk-aux-synth.c | 11 +++++++----
1 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c
index e01a350..c199e78 100644
--- a/drivers/clk/spear/clk-aux-synth.c
+++ b/drivers/clk/spear/clk-aux-synth.c@@ -56,10 +56,11 @@ static long clk_aux_round_rate(struct clk_hw *hw, unsigned long drate, unsigned long *prate) { struct clk_aux *aux = to_clk_aux(hw); + unsigned long parent_rate = __clk_get_rate(__clk_get_parent(hw->clk)); int unused; - return clk_round_rate_index(hw, drate, aux_calc_rate, aux->rtbl_cnt, - &unused); + return clk_round_rate_index(hw, drate, parent_rate, aux_calc_rate, + aux->rtbl_cnt, &unused); } static unsigned long clk_aux_recalc_rate(struct clk_hw *hw,
@@ -96,14 +97,16 @@ static unsigned long clk_aux_recalc_rate(struct clk_hw *hw, } /* Configures new clock rate of aux */ -static int clk_aux_set_rate(struct clk_hw *hw, unsigned long drate) +static int clk_aux_set_rate(struct clk_hw *hw, unsigned long drate, + unsigned long prate) { struct clk_aux *aux = to_clk_aux(hw); struct aux_rate_tbl *rtbl = aux->rtbl; unsigned long val, flags = 0; int i; - clk_round_rate_index(hw, drate, aux_calc_rate, aux->rtbl_cnt, &i); + clk_round_rate_index(hw, drate, prate, aux_calc_rate, aux->rtbl_cnt, + &i); if (aux->lock) spin_lock_irqsave(aux->lock, flags);
--
viresh