Thread (25 messages) 25 messages, 7 authors, 2012-02-14

[PATCH] ARM: cache-v7: Disable preemption when reading CCSIDR

From: Stephen Boyd <hidden>
Date: 2012-02-02 23:36:52
Also in: linux-arm-msm, lkml

On 02/02/12 13:38, Nicolas Pitre wrote:
On Thu, 2 Feb 2012, Russell King - ARM Linux wrote
quoted
On Thu, Feb 02, 2012 at 11:24:46AM -0800, Stephen Boyd wrote:
quoted
Should we move get_thread_info into assembler.h? It seems odd
to include entry-header.S but I saw that vfp was doing the same.
Probably yes, and probably also have preempt_disable and preempt_enable
assembler macros.  That's going to get rather icky if we have to
explicitly call the scheduler though (to solve (1)).
What about a pair of helpers written in C instead?

v7_flush_dcache_all() could be renamed, and a wrapper function called 
v7_flush_dcache_all() would call the preemption disable helper, call the 
former v7_flush_dcache_all code, then call the preemption enable helper.

Then __v7_setup() could still call the core cache flush code without 
issues.
I tried to put the preemption disable/enable right around the place
where it was needed. With this approach we would disable preemption
during the entire cache flush. I'm not sure if we want to make this
function worse for performance, do we? It certainly sounds easier than
writing all the preempt macros in assembly though.

-- 
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
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