On Fri, 2012-01-20 at 18:00 +0530, Ravi Kumar V wrote:

On 1/17/2012 7:15 PM, Vinod Koul wrote:

quoted

On Fri, 2012-01-06 at 18:17 +0530, Ravi Kumar V wrote:
<sorry for delayed review, was on vacation and now traveling>

quoted

As our ADM Scatter-gather hardware needs
-32-bit command configuration parameter
  apart from
-32-bit source address
-32-bit destination address
-16-bit length

So,we have added new parameter in struct scatterlist to support xfer
descriptor
specific private data, and for supporting ADM Box mode DMA we added
new
API and data structure.

what do you mean by "ADM Box mode"?

ADM Box mode is a interleaved type of DMA where data from rows of equal 
length and equal distance(bytes) between each other are transferred to 
similar pattern of rows.
Each row length and distance between each row in destination pattern may 
not be equal to source pattern.
Distance between beginning of any two rows are always greater than row 
length.
Example:
If 4 rows of 16 bytes each are arranged such that distance between 
beginning of any two rows are 32 bytes.
Now they can be transferred using BOX mode to destination pattern 
arranged in 2 rows of 32 bytes each and distance between them can be any 
lets say 128 bytes.

Source pattern:
4 data rows starts address 0th byte.

0-----16-bytes-data-----15
16    16 bytes void     31
32---------data---------47
48         void         63
64---------data---------79
80         void         95
96---------data--------111

Transferred to destination
Destination pattern:
2 rows
0----------32-bytes-data----------31
32         96 bytes void         127
128-------------data-------------159

Sounds like you should be using interleaved API

Please see this and read the patch history, which has nice details about
this

/**
 * struct dma_interleaved_template - Template to convey DMAC the
transfer pattern
 *       and attributes.
 * @src_start: Bus address of source for the first chunk.
 * @dst_start: Bus address of destination for the first chunk.
 * @dir: Specifies the type of Source and Destination.
 * @src_inc: If the source address increments after reading from it.
 * @dst_inc: If the destination address increments after writing to it.
 * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read).
 *              Otherwise, source is read contiguously (icg ignored).
 *              Ignored if src_inc is false.
 * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write).
 *              Otherwise, destination is filled contiguously (icg ignored).
 *              Ignored if dst_inc is false.
 * @numf: Number of frames in this template.
 * @frame_size: Number of chunks in a frame i.e, size of sgl[].
 * @sgl: Array of {chunk,icg} pairs that make up a frame.
 */
struct dma_interleaved_template {
        dma_addr_t src_start;
        dma_addr_t dst_start;
        enum dma_transfer_direction dir;
        bool src_inc;
        bool dst_inc;
        bool src_sgl;
        bool dst_sgl;
        size_t numf;
        size_t frame_size;
        struct data_chunk sgl[0];
};
using the interleaved API:
        struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
                struct dma_chan *chan, struct dma_interleaved_template *xt,
                unsigned long flags);


-- 
~Vinod