[PATCH 01/25] ARM: mm: Add strongly ordered descriptor support.

On Wed, Sep 14, 2011 at 1:53 AM, Tony Lindgren [off-list ref] wrote:

* Santosh Shilimkar [off-list ref] [110904 06:22]:

quoted

On certain architectures, there might be a need to mark certain
addresses with strongly ordered memory attributes to avoid ordering
issues at the interconnect level.

This is something Russell needs to look.

You might want to also read the mailing list archives regarding the
strongly ordered access.

Basically it still won't guarantee that the write gets to the
device, only a read back from the device in question guarantees
that at the bus level.

Russell has already seen this. I have sent this patches to Russell
before adding them
in the queue.

This is different. There is a BUG in asynchronous bridges on OMAP44XX
devices and
that's the reason it' s needed.

Regards
Santosh