[PATCH] ARM: S3C6410: Add some lower frequencies for 800MHz base clock operation
From: Mark Brown <hidden>
Date: 2011-05-06 09:45:40
From: Mark Brown <hidden>
Date: 2011-05-06 09:45:40
On Fri, May 06, 2011 at 01:58:21PM +0900, Kukjin Kim wrote:
Hmm, I'm not sure this should be OK...because guided(or tested?) dvfs level is following for 800Mhz. L3: 133, L2: 266, L1: 400 and L0: 800.
And I couldn't find about supporting of 100Mhz or 200Mhz in its hw design guide. Of course, it doesn't mean this is wrong but at least need to check again.
It appears to work for me in my tests; I've been running my systems like this since I introduced the change. Since it's the same divisions down from 800MHz as the existing ones from 667MHz and the part supports operation down to 66MHz so all the frequencies are well within the absolute limits I'd be a little surprised if there were any problems. As I've not yet been able to obtain the design guide I've no idea about any information it may provide.