[PATCH V5 15/63] ST SPEAr: Correcting SOC Config base address for spear320
From: Viresh Kumar <hidden>
Date: 2011-01-20 07:25:54
Subsystem:
arm port, the rest · Maintainers:
Russell King, Linus Torvalds
Signed-off-by: Viresh Kumar <redacted> --- arch/arm/mach-spear3xx/include/mach/spear320.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index cacf17a..53677e4 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h@@ -62,7 +62,7 @@ #define SPEAR320_SMII1_BASE 0xAB000000 #define SPEAR320_SMII1_SIZE 0x01000000 -#define SPEAR320_SOC_CONFIG_BASE 0xB4000000 +#define SPEAR320_SOC_CONFIG_BASE 0xB3000000 #define SPEAR320_SOC_CONFIG_SIZE 0x00000070 /* Interrupt registers offsets and masks */ #define INT_STS_MASK_REG 0x04
--
1.7.3.4