Thread (56 messages) 56 messages, 12 authors, 2021-06-09

RE: [PATCH RFC 0/3] riscv: Add DMA_COHERENT support

From: David Laight <hidden>
Date: 2021-06-04 09:02:35
Also in: linux-riscv, linux-sunxi, lkml

From: Palmer Dabbelt
Sent: 03 June 2021 16:39
...
An example here would be the errata: every system has errata of some
sort, so if we start flipping off various vendor's errata Kconfigs
you'll end up with kernels that only function properly on some systems.
That's fine with me, as long as it's possible to turn on all vendor's
errata Kconfigs at the same time and the resulting kernel functions
correctly on all systems.
ISTM that if you can (easily) detect the errata then the detection
should be left it - but the kernel fail to boot if the system
needs the errata fixed.

The same would be needed for DMA in systems with non-coherent memory.

Only a hardware engineer would build a system with non-coherent memory
and without the ability to do uncached accesses and flush/invalidate
small sections of cache.

Mind you we did get a dual-cpu system that didn't have cache-coherency
between the cpus! That was singularly useless.

	David

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Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)
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