On Mon, May 24, 2021 at 6:42 PM Anup Patel [off-list ref] wrote:

On Mon, May 24, 2021 at 12:22 PM [off-list ref] wrote:

quoted

From: Guo Ren <redacted>

Kernel virtual address translation should avoid care asid or it'll
cause more TLB-miss and TLB-refill. Because the current asid in satp
belongs to the current process, but the target kernel va TLB entry's
asid still belongs to the previous process.

Signed-off-by: Guo Ren <redacted>
Cc: Anup Patel <redacted>
Cc: Palmer Dabbelt <redacted>
---
 arch/riscv/include/asm/pgtable.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 78f2323..017da15 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h

@@ -135,6 +135,7 @@
                                | _PAGE_PRESENT \
                                | _PAGE_ACCESSED \
                                | _PAGE_DIRTY \
+                               | _PAGE_GLOBAL \
                                | _PAGE_CACHE)

It seems this patch is not based on the upstream kernel. The
_PAGE_CACHE seems to be from your other patch series.

Please rebase these patches on the latest upstream kernel without
dependency on any other patch series.

Yes, it based on DMA_COHERENT. I'll rebase in PATCH V2, thx.

Regards,
Anup

quoted

 #define PAGE_KERNEL            __pgprot(_PAGE_KERNEL)
--
2.7.4

-- 
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/