Re: [PATCH v5 6/7] x86/tlb: optimizing flush_tlb_mm
From: Borislav Petkov <hidden>
Date: 2012-05-15 14:05:17
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From: Borislav Petkov <hidden>
Date: 2012-05-15 14:05:17
Also in:
lkml
On Tue, May 15, 2012 at 09:39:05AM -0400, Steven Rostedt wrote:
quoted
But you have to weight that against the cost of re-population, and that's the difficult bit, since we have no clue how many tlb entries are in use by the current cr3. It might be possible for intel to give us this information, I've asked for something similar for cachelines.What information? The # of tlb entries in use?
... by the current %cr3, yes. And also, before we delve into details, we still don't have a representative benchmark where this shows any improvement. -- Regards/Gruss, Boris. Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach GM: Alberto Bozzo Reg: Dornach, Landkreis Muenchen HRB Nr. 43632 WEEE Registernr: 129 19551