Re: [PATCH 15/24] C6X: cache control

Arnd Bergmann [off-list ref] wrote:

quoted

+#define IMCR_BASE	  0x01840000

Please don't hardcode MMIO regions like this. You should have the base
address in the device tree and use of_iomap() like you do in some other
cases.  If you need this really early, you might need to

What about for memory-mapped CPU registers that you might need to access in
head.S?

MN10300, for example, has a bunch of these - such the atomic operation
parameter and control registers.  Getting some of these through the device
tree adds potentially quite a lot of overhead.

David