On Fri, 2022-11-18 at 16:21 +0000, Schimpe, Christina wrote:

quoted

On Thu, 2022-11-17 at 12:25 +0000, Schimpe, Christina wrote:

quoted

quoted

Hmm, we definitely need to be able to set the SSP. Christina,
does
GDB need anything else? I thought maybe toggling SHSTK_EN?

In addition to the SSP, we want to write the CET state. For
instance
for inferior calls, we want to reset the IBT bits.
However, we won't write states that are disallowed by HW.

Sorry, I should have given more background. Peter is saying we
should split
the ptrace interface so that shadow stack and IBT are separate.
They would also no longer necessarily mirror the CET_U MSR format.
Instead the kernel would expose a kernel specific format that has
the
needed bits of shadow stack support. And a separate one later for
IBT.

So the question is what does shadow stack need to support for
ptrace
besides SSP? Is it only SSP? The other features are SHSTK_EN and
WRSS_EN.
It might actually be nice to keep how these bits get flipped more
controlled
(remove them from ptrace). It looks like CRIU didn't need them.

GDB currently reads the CET_U and SSP register. However, we don’t
necessarily have to read EB_LEG_BITMAP_BASE.
In addition to SSP, we want to write the bits for the IBT state
machine (TRACKER and SUPPRESS).
However, besides that GDB does not have to write anything else.

Again, this is just about shadow stack. IBT will have a separate
interface. So based on these comments, I'll change the interface in
this patch to one for simply reading/writing SSP.