Thomas Steudten [off-list ref] writes:

On http://steudten.com/alpha/perf.php4 you can read:
See prefetch section:
The Alpha 21264 initiates a prefetch operation by executing one of the
load instructions as summarized in the table below. Note that the
destination register is R31 or F31. When used as a source register,
R31 and F31 return integer zero and floating point zero,
respectively. When used as a destination register as shown below, R31
and F31 denote the purpose of these instructions as a prefetch
operation. Earlier Alpha implementations ignore these
instructions. Some care must be taken as a prefetch with an invalid
address must be dismissed by firmware and a prefetch can cause an
alignment trap.

Well, the architecture manual requires these instructions have no
visible effect whatsoever, i. e. they never trap. It seems sensible to
me to enforce this also in kernel space, since this is what gcc
assumes.

-- 
	Falk