-----Original Message-----
From: Phil Yang <redacted>
Sent: Monday, July 22, 2019 2:14 PM
To: dev@dpdk.org
Cc: thomas@monjalon.net; Jerin Jacob Kollanukkaran <redacted>;
gage.eads@intel.com; hemant.agrawal@nxp.com;
Honnappa.Nagarahalli@arm.com; gavin.hu@arm.com; nd@arm.com
Subject: [EXT] [PATCH v4 1/3] eal/arm64: add 128-bit atomic compare exchange
Add 128-bit atomic compare exchange on aarch64.

Suggested-by: Jerin Jacob <redacted>
Signed-off-by: Phil Yang <redacted>
Tested-by: Honnappa Nagarahalli <redacted>
Reviewed-by: Honnappa Nagarahalli <redacted>
+
+#
+# Compile ARM LSE ATOMIC instructions statically #

There is NO value for the keyword "statically" here. Right?

+CONFIG_RTE_ARM_FEATURE_ATOMICS=n

Add for octeontx2 as well.

 CONFIG_RTE_CACHE_LINE_SIZE=64
 CONFIG_RTE_MAX_NUMA_NODES=2
 CONFIG_RTE_MAX_LCORE=256

+rte_atomic128_cmp_exchange(rte_int128_t *dst,
+				rte_int128_t *exp,
+				const rte_int128_t *src,
+				unsigned int weak,
+				int success,
+				int failure)
+{
+	/* Always do strong CAS */
+	RTE_SET_USED(weak);
+	/* Ignore memory ordering for failure, memory order for
+	 * success must be stronger or equal
+	 */
+	RTE_SET_USED(failure);
+	/* Find invalid memory order */
+	RTE_ASSERT(success == __ATOMIC_RELAXED
+			|| success == __ATOMIC_ACQUIRE
+			|| success == __ATOMIC_RELEASE
+			|| success == __ATOMIC_ACQ_REL
+			|| success == __ATOMIC_SEQ_CST);
+
+#ifdef __ARM_FEATURE_ATOMICS

Shouldn't it be #if defined(__ARM_FEATURE_ATOMICS) ||  defined(RTE_ARM_FEATURE_ATOMICS) ?