[PATCH V3 3/3] dmaengine: dw-axi-dmac: set coherent mask
From: <hidden>
Date: 2021-10-01 14:13:00
Subsystem:
dma generic offload engine subsystem, synopsys designware axi dmac driver, the rest · Maintainers:
Vinod Koul, Eugeniy Paltsev, Linus Torvalds
From: Pandith N <redacted> Add support for setting dma coherent mask, dma mask is set to 64 bit Signed-off-by: Pandith N <redacted> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- Changes from v1->v2: Removed dt-binding to set coherent_bit_mask value. --- drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
index f46fd9895a13..79572ec532ef 100644
--- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
+++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c@@ -212,12 +212,16 @@ static inline bool axi_chan_is_hw_enable(struct axi_dma_chan *chan) static void axi_dma_hw_init(struct axi_dma_chip *chip) { + int ret; u32 i; for (i = 0; i < chip->dw->hdata->nr_channels; i++) { axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); axi_chan_disable(&chip->dw->chan[i]); } + ret = dma_set_mask_and_coherent(chip->dev, DMA_BIT_MASK(64)); + if (ret) + dev_warn(chip->dev, "Unable to set coherent mask\n"); } static u32 axi_chan_get_xfer_width(struct axi_dma_chan *chan, dma_addr_t src,
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2.17.1