Re: [PATCH V5 0/3] dmaengine: dw-axi-dmac: support parallel memory <--> peripheral transfers

From
Vinod Koul <vkoul@kernel.org>
Date
2021-08-02 06:50:07
Reply to
unknown sender, 2021-08-02
On 02-08-21, 11:24, pandith.n@intel.com wrote:
From: Pandith N <redacted>

Added support for multiple DMA_MEM_TO_DEV, DMA_DEV_TO_MEM transfers in
parallel. Peripherals can use DMA for both transmit and receive
operations in parallel.

To setup DMA handshaking, the peripheral source number to be programmed
in respective channel select slot of AXIDMA_CTRL_DMA_HS_SEL. No need to
check for free slot in dw_axi_dma_set_hw_channel().

The channel slot used in AXIDMA_CTRL_DMA_HS_SEL needs to be set in
src_per/dst_per of CHx_CFG register

Burst length, DMA HW capability set in dt-binding is now used in driver.
Applied, thanks

-- 
~Vinod
Thread (5 messages) 5 messages, 2 authors, last reply 2021-08-02
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