Thread (4 messages) 4 messages, 1 author, 2021-07-15
STALE1903d

Revision v3 of 3 in this series.

Revisions (3)
  1. v3 current
  2. v4 [diff vs current]
  3. v5 [diff vs current]

[PATCH V3 0/3] dmaengine: dw-axi-dmac: support parallel memory <--> peripheral transfers

From: <hidden>
Date: 2021-07-15 11:14:00

From: Pandith N <redacted>

Added support for multiple DMA_MEM_TO_DEV, DMA_DEV_TO_MEM transfers in
parallel. Peripherals can use DMA for both transmit and receive
operations in parallel.
To setup DMA handshaking, the peripheral source number to be programmed
in respective channel select slot of AXIDMA_CTRL_DMA_HS_SEL. No need to
check for free slot in dw_axi_dma_set_hw_channel().

The channel slot used in AXIDMA_CTRL_DMA_HS_SEL needs to be set in
src_per/dst_per of CHx_CFG register

Burst length, DMA HW capability set in dt-binding is now used in driver.

Changes since v1:
Added new macro, magic mask for HW handshake select.
Typos in commit message are corrected

Changes since v2:
Split the patch as follows
Patch 1: Remove free slot check algorithm in dw_axi_dma_set_hw_channel()
Patch 2: The channel slot used needs to be set in CHx_CFG src/dst_per
Patch 3: Usage of burst length HW capability

Pandith N (3):
  dmaengine: dw-axi-dmac: Remove free slot check algorithm in
    dw_axi_dma_set_hw_channel
  dmaengine: dw-axi-dmac: support parallel memory <--> peripheral
    transfers
  dmaengine: dw-axi-dmac: Burst length settings

 .../dma/dw-axi-dmac/dw-axi-dmac-platform.c    | 56 +++++++++----------
 drivers/dma/dw-axi-dmac/dw-axi-dmac.h         |  4 ++
 2 files changed, 29 insertions(+), 31 deletions(-)

-- 
2.17.1
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