Thread (15 messages) 15 messages, 3 authors, 2018-10-08

[v5,4/7] dmaengine: xilinx_dma: program hardware supported buffer length

From: Andrea Merello <hidden>
Date: 2018-10-08 06:46:57
Also in: linux-arm-kernel, linux-devicetree, lkml

On Tue, Oct 2, 2018 at 4:56 PM Vinod [off-list ref] wrote:
On 28-09-18, 08:53, Andrea Merello wrote:
quoted
On Tue, Sep 18, 2018 at 6:25 PM Vinod [off-list ref] wrote:
quoted
quoted
quoted
@@ -964,7 +968,7 @@ static int xilinx_dma_calc_copysize(struct xilinx_dma_chan *chan,
                                  int size, int done)
 {
      size_t copy = min_t(size_t, size - done,
-                  XILINX_DMA_MAX_TRANS_LEN);
+                         chan->xdev->max_buffer_len);
hmm why not add max_buffer_len in patch 1 again, and then use default
len as XILINX_DMA_MAX_TRANS_LEN and add multiple lengths here :)
Sorry, I'm not getting your point. Could you please elaborate the "add
multiple lengths here" thing ?
IIRC (sorry been travelling and vacation), add
chan->xdev->max_buffer_len in patch 1 and initialize it to
XILINX_DMA_MAX_TRANS_LEN. Then in subsequent patches update the length.
Ah ok. IMO introducing max_buffer_len seems more related to what 4/7
does (actually getting the max transfer len from DT,  thus it is not
constant anymore) rather than to what 1/7 does (commonizing the
calculation of transfer len as it is).. This is why I've introduced it
in 4/7..

.. But if you prefer this way, I'll change this :) .. Maybe we can
change 1/7 commit message so that this change looks less off-topic..
But I have not found a very good title yet.. Something like "Prepare
for DMA copy size calculation rework" ?
--
~Vinod
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