Since making use of the DMA API will require the architecture code to
have the correct notion of device cache-coherency on architectures like
ARM, explicitly call this out in the virtio-mmio DT binding. The ship
has sailed for legacy virtio, but let's hope that we can head off any
future firmware mishaps.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
 Documentation/devicetree/bindings/virtio/mmio.txt | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/virtio/mmio.txt b/Documentation/devicetree/bindings/virtio/mmio.txt
index 5069c1b8e193..999a93faa67c 100644
--- a/Documentation/devicetree/bindings/virtio/mmio.txt
+++ b/Documentation/devicetree/bindings/virtio/mmio.txt

@@ -7,6 +7,16 @@ Required properties:
 - compatible:	"virtio,mmio" compatibility string
 - reg:		control registers base address and size including configuration space
 - interrupts:	interrupt generated by the device
+- dma-coherent:	required if the device (or host emulation) accesses memory
+		cache-coherently, absent otherwise
+
+Linux implementation note:
+
+virtio devices not advertising the VIRTIO_F_IOMMU_PLATFORM flag have been
+implicitly assumed to be cache-coherent by Linux, and for legacy reasons this
+behaviour is likely to remain.  If VIRTIO_F_IOMMU_PLATFORM is advertised, then
+such assumptions cannot be relied upon and the "dma-coherent" property must
+accurately reflect the coherency of the device.
 
 Example:
 

@@ -14,4 +24,5 @@ Example:
 		compatible = "virtio,mmio";
 		reg = <0x3000 0x100>;
 		interrupts = <41>;
+		dma-coherent;