Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api

On Thursday 21 May 2009, Avi Kivity wrote:

Paul Brook wrote:

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In any case we need some internal API for this, and qemu_irq looks
like a good choice.

What do you expect to be using this API?

virtio, emulated devices capable of supporting MSI (e1000?), device
assignment (not yet in qemu.git).

It probably makes sense to have common infrastructure in pci.c to
expose/implement device side MSI functionality. However I see no need for
a direct API between the device and the APIC. We already have an API for
memory accesses and MMIO regions. I'm pretty sure a system could
implement MSI by pointing the device at system ram, and having the CPU
periodically poll that.

Instead of writing directly, let's abstract it behind a qemu_set_irq().
This is easier for device authors.  The default implementation of the
irq callback could write to apic memory, while for kvm we can directly
trigger the interrupt via the kvm APIs.

I'm still not convinced.

A tight coupling between PCI devices and the APIC is just going to cause us 
problems later one. I'm going to come back to the fact that these are memory 
writes so once we get IOMMU support they will presumably be subject to 
remapping by that, just like any other memory access.

Even ignoring that, qemu_irq isn't really the right interface. A MSI is a one-
off event, not a level state. OTOH stl_phys is exactly the right interface.

The KVM interface should be contained within the APIC implementation.

Paul