[PATCH AUTOSEL 5.11 44/61] drm/amd/display: Revert dram_clock_change_latency for DCN2.1
From: Sasha Levin <sashal@kernel.org>
Date: 2021-03-17 00:58:12
Also in:
amd-gfx, dri-devel, lkml
Subsystem:
amd display core, drm drivers, radeon and amdgpu drm drivers, the rest · Maintainers:
Harry Wentland, Leo Li, David Airlie, Simona Vetter, Alex Deucher, Christian König, Linus Torvalds
From: Sung Lee <redacted> [ Upstream commit b0075d114c33580f5c9fa9cee8e13d06db41471b ] [WHY & HOW] Using values provided by DF for latency may cause hangs in multi display configurations. Revert change to previous value. Tested-by: Daniel Wheeler <redacted> Signed-off-by: Sung Lee <redacted> Reviewed-by: Haonan Wang <redacted> Acked-by: Eryk Brol <redacted> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index 072f8c880924..2d2541cab705 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c@@ -296,7 +296,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { .num_banks = 8, .num_chans = 4, .vmm_page_size_bytes = 4096, - .dram_clock_change_latency_us = 11.72, + .dram_clock_change_latency_us = 23.84, .return_bus_width_bytes = 64, .dispclk_dppclk_vco_speed_mhz = 3600, .xfc_bus_transport_time_us = 4,
--
2.30.1