quoted

The current Fam17h cpu_llc_id  derivation has an underflow bug when

				^
			(Last Level Cache ID)

Let's write it out the first time.

Ack.

quoted

The apicid decoding is fixed for bits 3 and above,

						    ^
"is fixed ... in register... "

Ack.

quoted

which give the core
complex, node and socket IDs. The LLC is at the core complex level so we
can find a unique cpu_llc_id by right shifting the apicid by 3.

"... because then the LSBit will be the Core Complex ID."

Ack.

quoted

We can fix the underflow bug and simplify the code by replacing the
current cpu_llc_id derivation with a right shift.

Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Cc: <redacted> # v4.4..
Fixes: 3849e91f571d ("x86/AMD: Fix last level cache topology for AMD Fam17h systems")
---

I'll run it soon.

Thanks,
Yazen