[added to the 4.1 stable tree] powerpc: Use privileged SPR number for MMCR2

From
Sasha Levin <hidden>
Date
2016-06-21 02:04:59
Reply to
Sasha Levin, 2016-06-21
From: Thomas Huth <redacted>

This patch has been added to the 4.1 stable tree. If you have any
objections, please let us know.

===============

[ Upstream commit 8dd75ccb571f3c92c48014b3dabd3d51a115ab41 ]

We are already using the privileged versions of MMCR0, MMCR1
and MMCRA in the kernel, so for MMCR2, we should better use
the privileged versions, too, to be consistent.

Fixes: 240686c13687 ("powerpc: Initialise PMU related regs on Power8")
Cc: <redacted> # v3.10+
Suggested-by: Paul Mackerras <redacted>
Signed-off-by: Thomas Huth <redacted>
Acked-by: Paul Mackerras <redacted>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Sasha Levin <redacted>
---
 arch/powerpc/include/asm/reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 6fe14b4..a4bf6e0 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -708,7 +708,7 @@
 #define   MMCR0_FCWAIT	0x00000002UL /* freeze counter in WAIT state */
 #define   MMCR0_FCHV	0x00000001UL /* freeze conditions in hypervisor mode */
 #define SPRN_MMCR1	798
-#define SPRN_MMCR2	769
+#define SPRN_MMCR2	785
 #define SPRN_MMCRA	0x312
 #define   MMCRA_SDSYNC	0x80000000UL /* SDAR synced with SIAR */
 #define   MMCRA_SDAR_DCACHE_MISS 0x40000000UL
-- 
2.5.0
Thread (40 messages) 40 messages, 1 author, last reply 2016-06-21
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