[PATCH 3.10 48/62] clk: samsung: exynos4: Correct SRC_MFC register
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: 2014-01-14 00:59:53
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3.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Seung-Woo Kim <sw0312.kim@samsung.com> commit 5fdd1b56be51b1ec4dbde5b213d649ac717442da upstream. The SRC_MFC register offset was incorrect, which could cause have caused wrong calculation of rate of sclk_mfc clock, that could in turn lead to incorrect operation of MFC. This patch corrects it. Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Acked-by: Mike Turquette <redacted> [t.figa: Updated patch description] Signed-off-by: Tomasz Figa <redacted> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> --- drivers/clk/samsung/clk-exynos4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c@@ -40,7 +40,7 @@ #define SRC_TOP1 0xc214 #define SRC_CAM 0xc220 #define SRC_TV 0xc224 -#define SRC_MFC 0xcc28 +#define SRC_MFC 0xc228 #define SRC_G3D 0xc22c #define E4210_SRC_IMAGE 0xc230 #define SRC_LCD0 0xc234